Design, Modeling, Fabrication and Characterization of 2–5-μm Redistribution Layer Traces by Advanced Semiadditive Processes on Low-Cost Panel-Based Glass Interposers

This paper presents the latest advances in extending semiadditive process (SAP) methods to 2–5 μm lines and spaces, achieved using dry film photoresists on thin glass substrates, toward meeting the routing requirements for 20-μm bump pitch interposers. High-density chip-to-chip interconnections on 2.5-D interposers are a key enabler to meet the high logic to memory bandwidth needs of next-generation electronic systems. Such 2.5-D interposers require ultrafine redistribution layer (RDL) traces with line widths and spacing below 5 μm. This paper reports on the extension of panel scale and lower cost SAPs to achieve less than 5 μm lines and spaces, based on the ultrasmooth surface and improved dimensional stability of thin glass panels. A modified low-cost SAP method with newly developed differential seed layer etching was employed to fabricate the fine line and space patterns and coplanar waveguide (CPW) transmission on thin glass panels. Fine lines down to 2-μm lines and spaces and CPW lines with signal lengths up to 5 mm and ground-to-signal gaps down to 5.5 μm at 15-μm signal widths were successfully fabricated on ultra-thin glass panels. For comparison, the same processes were also applied to a silicon wafer. The signal insertion losses of CPW lines on the glass were 0.024 dB/mm better at 15 GHz than those on the silicon, as confirmed by simulations as well as VNA measurements. The measured insertion loss of 5-mm long CPW lines on glass interposer was 0.7 dB at 10 GHz and matched well to the simulated values.